/**
  ******************************************************************************
  * @file    tc32l010_syscfg.c
  * @author  CHIPAT Application Team
  * @version V1.0.0
  * @brief   This file provides firmware functions to manage the following
  *          functionalities of the SYSCFG peripheral:
  *           + Remapping the memory mapped at 0x00000000
  *           + Configuring the PORTS connection to the GPIO port
  *           + Configuring the PCA channel connection to the Peripheral
  *           + Configuring the TIM1 channel connection to the Peripheral
  *           + Configuring the TIM2 channel connection to the Peripheral
  *           + Configuring the CFGR2 features (Connecting some internal signal
  *             to the break input of TIM1)
  *
  ******************************************************************************
  */

/* Includes ------------------------------------------------------------------*/
#include "tc32l010_syscfg.h"

/** @addtogroup tc32l010_StdPeriph_Driver
  * @{
  */

/** @defgroup SYSCFG
  * @brief SYSCFG driver modules
  * @{
  */

/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private function prototypes -----------------------------------------------*/
/* Private functions ---------------------------------------------------------*/

/** @defgroup SYSCFG_Private_Functions
  * @{
  */


/**
  * @brief  Deinitializes the SYSCFG registers to their default reset values.
  * @param  None
  * @retval None
  * @note   MEM_MODE bits are not affected by APB reset.
  * @note   MEM_MODE bits took the value from the user option bytes.
  * @note   CFGR2 register is not affected by APB reset.
  * @note   CLABBB configuration bits are locked when set.
  * @note   To unlock the configuration, perform a system reset.
  */
void SYSCFG_DeInit(void)
{
    /* Set SYSCFG_CFGR1 register to reset value without affecting MEM_MODE bits */
    SYSCFG->CFGR1 &= SYSCFG_CFGR1_MEM_MODE;
    /* Set CFGR2 register to reset value: core lockup flag */
    SYSCFG->CFGR2 &= SYSCFG_CFGR2_LOCKUP_LOCK;
    /* Set PORTCR registers to reset value */
    SYSCFG->PORTCR = 0;
    SYSCFG->PCACR  = 0;
    SYSCFG->TIM1CR = 0;
    SYSCFG->TIM1CR = 0;
}

/**
  * @brief  Configures the memory mapping at address 0x00000000.
  * @param  SYSCFG_MemoryRemap: selects the memory remapping.
  *          This parameter can be one of the following values:
  *            @arg SYSCFG_MemoryRemap_Flash: Main Flash memory mapped at 0x00000000
  *            @arg SYSCFG_MemoryRemap_SystemMemory: System Flash memory mapped at 0x00000000
  *            @arg SYSCFG_MemoryRemap_SRAM: Embedded SRAM mapped at 0x00000000
  * @retval None
  */
void SYSCFG_MemoryRemapConfig(uint32_t SYSCFG_MemoryRemap)
{
    uint32_t tmpctrl = 0;

    /* Check the parameter */
    assert_param(IS_SYSCFG_MEMORY_REMAP(SYSCFG_MemoryRemap));

    /* Get CFGR1 register value */
    tmpctrl = SYSCFG->CFGR1;

    /* Clear MEM_MODE bits */
    tmpctrl &= (uint32_t) (~SYSCFG_CFGR1_MEM_MODE);

    /* Set the new MEM_MODE bits value */
    tmpctrl |= (uint32_t) SYSCFG_MemoryRemap;

    /* Set CFGR1 register with the new memory remap configuration */
    SYSCFG->CFGR1 = tmpctrl;
}

/**
  * @brief  Connect the selected parameter to the break input of TIM1.
  * @note   The selected configuration is locked and can be unlocked by system reset
  * @param  SYSCFG_Break: selects the configuration to be connected to break
  *         input of TIM1
  *          This parameter can be any combination of the following values:
  *            @arg SYSCFG_Break_Lockup: Connects Lockup output of CortexM0 to the break input of TIM1.
  * @retval None
  */
void SYSCFG_BreakConfig(uint32_t SYSCFG_Break)
{
    /* Check the parameter */
    assert_param(IS_SYSCFG_LOCK_CONFIG(SYSCFG_Break));

    SYSCFG->CFGR2 |= (uint32_t) SYSCFG_Break;
}

/**
  * @brief  Selects the GPIO pin used as SPI NSS.
  * @param  SPINSS_Sel: selects the GPIO port to be used as source
  *
  * @retval None
  */
void SYSCFG_PortConfig(uint8_t SPINSS_Sel)
{
    /* Check the parameters */
    assert_param(IS_SPINSS_PORT_SOURCE(SPINSS_Sel));

    SYSCFG->PORTCR = SPINSS_Sel & SYSCFG_PORTCR_SPINSSSEL;
}

/**
  * @brief  Selects the signal used as PCA Capture.
  * @param  Chn: selects the channel.
  *          This parameter can be one of the following values:
  *            @arg PCA_CAP0:
  *            @arg PCA_CAP1:
  *            @arg PCA_CAP2:
  *            @arg PCA_CAP3:
  *            @arg PCA_CAP4:
  * @param  CAP_Sel: selects the signal.
  *          This parameter can be one of the following values:
  *            @arg PCA_CAP_SEL_PCACHn:
  *            @arg PCA_CAP_SEL_USART0_RXD:
  *            @arg PCA_CAP_SEL_USART1_RXD:
  *            @arg PCA_CAP_SEL_LPUART_RXD:
  * @retval None
  */
void SYSCFG_PCAConfig(uint8_t Chn, uint8_t CAP_Sel)
{
    uint32_t reg;

    /* Check the parameters */
    assert_param(IS_PCA_CAP_CHN(Chn));
    assert_param(IS_PCA_CAPn_SEL(CAP_Sel));

    reg = SYSCFG->PCACR;
    reg &= ~(PCA_CAP_SEL_LPUART_RXD << (2 * Chn));
    SYSCFG->PCACR = reg | (CAP_Sel << (2 * Chn));
}

/**
  * @brief  Selects the signal used as Time1 channel.
  * @param  Chn: selects the channel.
  *          This parameter can be one of the following values:
  *            @arg TIM1_CH1IN:
  *            @arg TIM1_CH2IN:
  *            @arg TIM1_CH3IN:
  *            @arg TIM1_CH4IN:
  * @param  ChxIn_Sel: selects the signal.
  *          This parameter can be one of the following values:
  *            @arg TIM1_CHxIN_SEL_TIMCHx:
  *            @arg TIM1_CHxIN_SEL_USART0_RXD:
  *            @arg TIM1_CHxIN_SEL_USART1_RXD:
  *            @arg TIM1_CHxIN_SEL_LPUART_RXD:
  *            @arg TIM1_CHxIN_SEL_LSI:
  * @retval None
  */
void SYSCFG_TIM1ChnConfig(uint8_t Chn, uint8_t ChxIn_Sel)
{
    uint32_t reg;

    /* Check the parameters */
    assert_param(IS_PCA_CAP_CHN(Chn));
    assert_param(IS_PCA_CAPn_SEL(ChxIn_Sel));

    reg = SYSCFG->TIM1CR;
    reg &= ~(SYSCFG_TIM1CR_CH1IN_SEL << (4 * Chn));
    SYSCFG->TIM1CR = reg | (ChxIn_Sel << (4 * Chn));
}

/**
  * @brief  Selects the GPIO pin used as TIM1 ETR.
  * @param  ETR_Sel: selects the GPIO port to be used as source
  *
  * @retval None
  */
void SYSCFG_TIM1ETRConfig(uint32_t ETR_Sel)
{
    uint32_t reg;

    /* Check the parameters */
    assert_param(IS_TIM1_ETR_SEL(ETR_Sel));

    reg = SYSCFG->TIM1CR;
    reg &= ~ SYSCFG_TIM1CR_ETR_SEL;
    SYSCFG->TIM1CR = reg | ETR_Sel;
}

/**
  * @brief  Selects the signal used as Time2 channel.
  * @param  Chn: selects the channel.
  *          This parameter can be one of the following values:
  *            @arg TIM2_CH1IN:
  *            @arg TIM2_CH2IN:
  *            @arg TIM2_CH3IN:
  *            @arg TIM2_CH4IN:
  * @param  ChxIn_Sel: selects the signal.
  *          This parameter can be one of the following values:
  *            @arg TIM2_CHxIN_SEL_TIMCHx:
  *            @arg TIM2_CHxIN_SEL_USART0_RXD:
  *            @arg TIM2_CHxIN_SEL_USART1_RXD:
  *            @arg TIM2_CHxIN_SEL_LPUART_RXD:
  *            @arg TIM2_CHxIN_SEL_LSI:
  * @retval None
  */
void SYSCFG_TIM2ChnConfig(uint8_t Chn, uint8_t ChxIn_Sel)
{
    uint32_t reg;

    /* Check the parameters */
    assert_param(IS_PCA_CAP_CHN(Chn));
    assert_param(IS_PCA_CAPn_SEL(ChxIn_Sel));

    reg = SYSCFG->TIM2CR;
    reg &= ~(SYSCFG_TIM2CR_CH1IN_SEL << (4 * Chn));
    SYSCFG->TIM2CR = reg | (ChxIn_Sel << (4 * Chn));
}

/**
  * @brief  Selects the GPIO pin used as TIM2 ETR.
  * @param  ETR_Sel: selects the GPIO port to be used as source
  *
  * @retval None
  */
void SYSCFG_TIM2ETRConfig(uint32_t ETR_Sel)
{
    uint32_t reg;

    /* Check the parameters */
    assert_param(IS_TIM2_ETR_SEL(ETR_Sel));

    reg = SYSCFG->TIM2CR;
    reg &= ~ SYSCFG_TIM2CR_ETR_SEL;
    SYSCFG->TIM2CR = reg | ETR_Sel;
}

/**
  * @}
  */

/**
  * @}
  */

/**
  * @}
  */

/************************ (C) COPYRIGHT CHIPAT *****END OF FILE****/
